In the global navigation satellite system (GNSS) field, where higher positioning accuracy and sensitivity are constantly pursued, RF chips serve as the “front-line sentinel” of receivers. Their performance directly determines the ability of the terminal to capture and process weak satellite signals. Among the many key modules of RF chips, the phase-locked loop (PLL) frequency synthesizer, which generates the local oscillator (LO) signal, is particularly crucial. Within this, the fractional frequency division technology plays a decisive role in affecting the purity of the signal.

Traditional integer-frequency division frequency synthesizers struggle with non-integer frequency relationships, limiting the flexibility of setting LO frequencies. Fractional frequency division technology dynamically adjusts the division ratio to generate an average fractional value, thus accurately producing the desired frequency. However, this technology introduces a tricky issue—fractional spurs. If these spurs fall within the PLL loop bandwidth, they cannot be filtered out, resulting in a decrease in the quality of the LO signal output by the RF chip. This ultimately leads to a deterioration in the signal-to-noise ratio (SNR) of the intermediate frequency (IF) signal produced during mixing, directly affecting the positioning accuracy of navigation terminals.

To tackle the problem of low-spur fractional frequency division, the research by Li Xin and Huang Haisheng thoroughly compares two mainstream technological solutions: the classic accumulator structure and the advanced MASH1-1-1 Δ-Σ modulator structure.

Accumulator Structure:

This structure is simple and cost-effective, but the division ratio can only toggle between two values (N and N+1). This periodic switching creates strong discrete spurs in the low-frequency range of the output spectrum, which is a notable drawback for high-performance RF chips.

MASH1-1-1 Δ-Σ Structure:

This structure cascades three first-order Δ-Σ modulators to achieve noise shaping, a key function that “pushes” the frequency quantization noise originally concentrated in the low-frequency band to the high-frequency band. In RF chip PLL design, noise in the high-frequency band can be effectively filtered out by the loop filter.

The research team used the typical application scenario of GNSS RF chips (reference frequency: 16.368 MHz, intermediate frequency: 3.996 MHz) to simulate both structures at the GPS L1 and BeiDou B1 frequency points. Power spectral density (PSD) analysis clearly showed that the Δ-Σ-based modulator successfully shifted the fractional spur energy from the critical 0-2 MHz low-frequency band to the high-frequency band, significantly improving the spectral purity within the PLL loop bandwidth.

Conclusion:

In modern high-performance GNSS RF chips that pursue low-spur operation, the fractional frequency division technology based on the MASH1-1-1 Δ-Σ structure is undoubtedly the superior choice. Through clever noise shaping, it effectively cleanses the LO spectrum, providing a solid technical foundation for RF chips to stably and accurately receive navigation signals in complex electromagnetic environments. This technology is the key engine driving the development of high-precision navigation terminals.