Achieving Breakthroughs in the Design and Performance of Self-Designed Navigation RF Chips

Yvette Wu     October 12, 2025 

As the global satellite navigation system evolves from being dominated by GPS to a “GNSS era” with multi-system compatibility, China has urgently demanded high-performance and highly autonomous navigation chips for the development and industrialization of the BeiDou system. In this context, RF chips play a critical role as the core front-end component of navigation receivers. The performance of these chips directly determines the sensitivity, anti-jamming capability, and positioning accuracy of the entire navigation system.

In their research, Zhao Jianxin and Zou Zhenjie proposed a fully autonomous, highly integrated multi-mode navigation RF chip architecture. This chip is based on RF-CMOS technology and adopts a single down-conversion intermediate frequency architecture. It integrates all key modules, including low-noise amplifier (LNA), mixer, complex filter, variable gain amplifier (VGA), frequency synthesizer, and a 4-bit ADC, to achieve efficient conversion from RF signals to digital intermediate frequency signals.

Circuit Design and Key Performance Optimizations

In terms of circuit design, the RF chip has been systematically optimized for critical parameters such as noise control, linearity, and image suppression. Through the combination of an LNA with a source-degeneration inductor structure and a fully differential RF-VGA, the noise figure is controlled to below 2 dB. A fifth-order Chebyshev complex filter achieves over 30 dB of out-of-band suppression, and the image rejection ratio is improved to 47 dB through a pre-calibration module, significantly enhancing signal purity.

Moreover, the chip exhibits outstanding dynamic range and linearity. A five-stage VGA design achieves a 50 dB gain control range, with an output third-order intercept point (OIP3) of over 20 dBm, ensuring stable reception of weak navigation signals even in complex electromagnetic environments.

Physical Design and Noise Suppression Techniques

In terms of physical design, the RF chip incorporates stringent isolation and anti-noise measures, including protective rings, independent substrate contacts, and power filtering technologies. These effectively suppress digital switch noise that could interfere with RF circuits, ensuring the stability of the chip’s operation even with high integration.

Test Results and Industry Implications

Test results show that this RF chip outperforms traditional design schemes in key metrics such as OIP3, IMRR, and noise figure. Not only is it fully compatible with the four major navigation systems—BeiDou, GPS, GLONASS, and Galileo—but it also has the technological capability to replace similar foreign products. This provides essential technical support for the domestic development and independence of China’s navigation receivers.

Yvette Wu

Yvette Wu – Chip Applications & Market Development Specialist Yvette Wu is a market-focused chip applications engineer. Her core responsibility lies in deeply mining and defining market demands, and efficiently integrating resources across the upstream and downstream industry chain—from chip design to end applications—to solve customers’ highly specialized and complex end-product requirements. Leveraging a keen insight into technology trends and customer application scenarios, she plays a vital role as a bridge between technology and the market. She excels at translating market needs into precise technical specifications and articulating complex technical solutions into clear customer value, ensuring products accurately address market…

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