Key Technologies in Multi-Mode Satellite Navigation RFchips
Yvette Wu October 7, 2025
Abstract
With the widespread application of satellite navigation systems globally, multi-mode satellite navigation receivers, capable of supporting various navigation systems such as GPS, GLONASS, Galileo, and BeiDou, are becoming the mainstream choice for navigation devices. However, their further expansion is significantly constrained by size and power consumption. The RF receiving unit, as the core component of a navigation receiver, directly affects the stability and reliability of the entire system. Traditional designs using discrete components result in large sizes, high power consumption, and unstable system performance. To overcome these limitations, replacing discrete components with Radio Frequency Application Specific Integrated Circuits (RF ASICs) has become the key technical path for achieving receiver miniaturization, low power consumption, and high stability. This paper systematically studies the key technologies in RF ASIC design for multi-mode satellite navigation receivers, proposes a complete RF chip architecture, and offers feasible solutions to the design challenges of core modules such as low-noise amplifiers, mixers, and frequency synthesizers. The findings provide theoretical and practical support for the autonomous development and integration of multi-mode navigation RFchips.
Introduction
With the continuous improvement and integration of global satellite navigation systems, multi-mode satellite navigation receivers, which can simultaneously receive and process signals from multiple navigation systems, have significantly enhanced positioning reliability, accuracy, and availability. As a result, they have become a major development direction in modern navigation technologies. However, with the increasing number of integrated functions, the size and power consumption issues of the receiver have become more prominent, particularly in portable and embedded devices, where these two factors directly limit the range of applications.
The RF receiving unit, as the front-end part of the navigation receiver, is responsible for key processes such as signal reception, amplification, and downconversion. Its performance directly affects the accuracy of the subsequent baseband processing and the overall stability of the system. Traditional RF receiving units are typically built using discrete components. Although these designs offer flexibility, their large size, high power consumption, and poor consistency restrict the performance of the receiver. As a result, shifting towards specialized RF Application Specific Integrated Circuits (ASICs) for the RF section has become an inevitable choice for achieving high performance, low cost, and compact size in receivers.
1. Multi-Mode Satellite Navigation RFchips Requirements
Multi-mode satellite navigation receivers need to support multiple frequency bands and modulation schemes simultaneously, placing higher demands on RFchips. On one hand, the chip must have wideband receiving capability to cover the operating frequency bands of various navigation systems. On the other hand, it must maintain high sensitivity while achieving low noise, high linearity, and excellent anti-jamming performance. Furthermore, to accommodate battery-powered mobile devices, the chip must have low power consumption and strike a balance between integration, cost, and reliability.
2. RFchip Architecture Design
Based on the above requirements, this paper proposes a complete RF ASIC architecture for multi-mode satellite navigation. The architecture adopts a Zero-IF (Zero Intermediate Frequency) or Low-IF receiver structure to simplify system complexity and reduce the number of external components. The chip integrates core modules, including a Low-Noise Amplifier (LNA), Mixer, Frequency Synthesizer, Filter, and Variable Gain Amplifier (VGA), through a highly integrated design, optimizing the signal chain and controlling power consumption.
3. Key Technologies and Solutions
3.1 Low-Noise Amplifier (LNA)
As the first active circuit in the receiver, the LNA’s noise figure directly impacts the system’s sensitivity. The multi-mode navigation chip requires the LNA to have low noise, high gain, and good input matching over a wide frequency range. The design uses a cascode structure combined with noise matching techniques to ensure gain while effectively suppressing noise. Additionally, adaptive biasing technology is introduced to maintain optimal performance under different operating conditions.
3.2 Mixer
The mixer downconverts RF signals to intermediate frequency. Its linearity and conversion gain are crucial for the system’s anti-jamming capability. This paper employs an active mixer based on the Gilbert Cell structure, optimizing the sizes and biasing conditions of the switching transistors to improve linearity and reduce local oscillator leakage. Furthermore, current reuse technology is used to reduce power consumption.
3.3 Frequency Synthesizer
The frequency synthesizer provides a stable and accurate local oscillator signal to the mixer. Multi-mode navigation requires rapid locking and coverage of multiple frequency points. The design uses a Phase-Locked Loop (PLL) structure, integrating a low-phase-noise Voltage-Controlled Oscillator (VCO) and a high-resolution divider. Digital calibration techniques are used to reduce frequency errors, and fractional division technology is employed to enable flexible frequency point configuration.
4. Summary and Outlook
This paper proposes a comprehensive RF ASIC design solution for multi-mode satellite navigation receivers, focusing on the design challenges and solutions for key modules such as the Low-Noise Amplifier, Mixer, and Frequency Synthesizer. Through circuit structure optimization and system integration, it is possible to significantly reduce the size and power consumption while improving the stability and overall performance of the receiver. In the future, with advances in technology and increasing system demands, multi-mode navigation RFchips will continue to evolve towards higher integration, lower power consumption, and stronger anti-jamming capabilities, providing solid technical support for the large-scale application of global navigation systems.
Yvette Wu
Yvette Wu – Chip Applications & Market Development Specialist Yvette Wu is a market-focused chip applications engineer. Her core responsibility lies in deeply mining and defining market demands, and efficiently integrating resources across the upstream and downstream industry chain—from chip design to end applications—to solve customers’ highly specialized and complex end-product requirements. Leveraging a keen insight into technology trends and customer application scenarios, she plays a vital role as a bridge between technology and the market. She excels at translating market needs into precise technical specifications and articulating complex technical solutions into clear customer value, ensuring products accurately address market…
