Design and Implementation of RF Chips for Beidou Navigation: Overcoming Bluetooth Interference Challenges
Jason Chen October 4, 2025
Abstract
With the growing adoption of the Beidou satellite navigation system, the RF chip plays a pivotal role in ensuring high performance and reliability. This article explores the design and implementation of a Beidou RF chip that addresses Bluetooth interference, a significant challenge faced by integrated and miniaturized navigation terminal devices. By mitigating Bluetooth interference, this chip improves the quality of Radio Determination Satellite Service (RDSS) short messages, essential for fields like geological disaster monitoring, hydrological surveys, and ship navigation.
I. Interference Background and Technical Challenges
Bluetooth devices, operating in the 2.402–2.480 GHz frequency band, are positioned just 8 MHz away from the lower limit of the Beidou RDSS receive band. With Bluetooth’s transmit power typically at 0 dBm and RDSS signal power at -100 dBm, the disparity between these signals can reach up to 60 dB. Due to the proximity of these frequencies and bandwidth limitations, traditional RF filters cannot effectively eliminate such strong interference, leading to receiver front-end saturation and compromising system sensitivity and communication quality.
To address this interference, a Beidou RF chip with advanced filtering techniques and robust circuit design is crucial for improving the system’s reliability in challenging environments.
II. System Architecture Design of the RF Chip
The Beidou RF chip adopts a double-conversion architecture, integrating an off-chip Surface Acoustic Wave (SAW) filter with an on-chip active filter to create a highly linear and interference-resistant receiver channel. The architecture includes:
1. First-Stage Frequency Conversion
In the first stage, the RF signal is downconverted to a higher intermediate frequency (IF). The off-chip SAW filter provides over 40 dB of out-of-band rejection, effectively eliminating Bluetooth interference from the signal.
2. Second-Stage Frequency Conversion and Filtering
The signal is further downconverted to a lower frequency, where an on-chip RC active filter performs secondary filtering. This dual-stage filtering ensures an optimal balance between performance and integration. Additionally, a 30 dB low-noise amplifier (LNA) is included to prevent signal saturation and maintain excellent linearity.
III. Key Circuit Design and Simulation of RF Chips
1. First-Stage Frequency Conversion Circuit
The passive mixer in the first-stage circuit offers exceptional linearity. Simulation results show:
1.Gain stability within 10–12 dB.
2.Noise figure below 15 dB.
3.High input 1 dB compression point at -5 dBm, ensuring reliable performance in interference-rich environments.
2. Second-Stage Filtering and Gain Control
The 6-stage programmable gain amplifier combined with an RC low-pass filter achieves a gain adjustment range of 55 dB, maintaining excellent out-of-band rejection. The gain steps are finely tuned at 8 dB per stage, allowing precise control over the filter bandwidth.
IV. Test Verification and Performance Analysis
The Beidou RF chip was fabricated using a 0.13 μm RFCMOS process and packaged in a QFN64. Key test results include:
1.Noise Figure: The overall noise figure of the receiver channel is less than 15 dB.
2.Linearity: The input 1 dB compression point reaches -35 dBm, demonstrating high linearity in the presence of strong interference.
3.Anti-Interference Performance: Under -45 dBm Bluetooth interference, the receiver successfully maintains RDSS signal reception with a carrier-to-noise ratio of 42–44. Even in real satellite alignment tests, the receiver completed short message communications despite close proximity to a Bluetooth device.
V. Conclusion and Market Significance of RF Chips
The Beidou RF chip designed in this study effectively mitigates Bluetooth interference through a hybrid architecture of double frequency conversion and advanced filtering techniques. The innovations include:
1.High-linearity passive mixers and programmable gain filters that allow high dynamic range reception in interference-heavy environments.
2.The integration of off-chip SAW filters and on-chip active filters that significantly reduce frequency interference from Bluetooth devices.
This design not only solves interference issues for Beidou terminals but also lays the foundation for future RF chip development in other applications, such as 4G/5G interference mitigation and broader use in IoT devices. The scalability of this technology holds significant market potential for industries requiring robust satellite navigation systems, including autonomous driving, precision agriculture, and emergency communications.
Jason Chen
Dr. Jason Chen – Post-Silicon Validation & Automation Expert Dr. Jason Chen is a seasoned expert in semiconductor test, specializing in developing advanced automated test solutions for mixed-signal, analog discrete, MCU, and SoC applications. He brings years of extensive experience from leading instrument manufacturers, encompassing application solution development, lab characterization automation, production ramp-up, and test platform migration. Dr. Chen possesses a deep understanding of the critical role post-silicon validation plays in ensuring high-quality chip manufacturing. This comprehensive process includes bring-up, performance validation, robustness testing, characterization, ATE NPI, and reliability testing. He is dedicated to advancing post-silicon validation methodologies by fostering…
